The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Handheld consumer electronics such as cell phones and smartphones typically require high-efficiency DC-DC power supplies. Some consumer electronics require an output voltage that is larger than the input voltage that is typically supplied by a battery. Large voltage step-up ratios typically require specialized high-voltage transistor devices and large magnetic components such as inductors that determine the total volume, efficiency and cost of the power supply.
Referring now to FIGS. 1A and 1B, a step-up converter 10 according to the prior art is shown. The step-up converter 10 includes a voltage supply VIN that is connected to one end of an inductor L. First and second transistors QSR and QMS each include a control terminal and first and second terminals. The second terminal of the transistor QSR is connected to a node LX. The node LX is also connected to another end of the inductor L and to a first terminal of the transistor QMS.
The first terminal of transistor QSR is connected to an output capacitor COUT and to a load. A voltage output VOUT of the step-up converter 10 is provided at the first terminal of the transistor QSR. The step-up converter 10 operates at a duty cycle D and a period T.
In FIG. 1B, voltage is shown as a function of time at the node LX and across the transistor QMS. As can be appreciated, the voltage swing on the inductor L during operation is VOUT. Large voltage step-up ratios typically require specialized high-voltage laterally diffused MOS (LDMOS) devices. The large inductor L substantially determines the total volume, efficiency and cost of the step-up converter 10. In particular, the large size of the inductor has up to now made it commercially impractical to co-integrate the inductor with the MOS switch devices.
In FIG. 1C, a multi-level step-down converter 50 includes a voltage source VIN and transistors QMS1, QMS2, QSR1 and QSR2. The voltage source VIN is connected to a first terminal of the transistor QMS2. A first terminal of the transistor QMS2 and a second terminal of the transistor QMS1 are connected to one end of the capacitor Cfly. A second terminal of the transistor QMS1 and a first terminal of the transistor QSR1 are connected to a node LX and to one end of an inductor L. A second terminal of the transistor QSR1 and a first terminal of the transistor QSR2 are connected to another end of the capacitor Cfly. Another end of the inductor L is connected to a capacitor COUT and to a load.
Multi-level step-down converters shown in FIG. 1C have been used in high voltage (1-5 kV) applications. Switches used in the converters are rated to withstand approximately half of a maximum input voltage. However, other multi-level step-down converter topologies are typically used at lower voltages. The topology in FIG. 1C encounters problems during start-up when the switches QSR1 and QMS2 need to withstand the full input voltage due to 0V across the capacitor Cfly, which is initially uncharged. During normal operation, voltage transients at the input are immediately passed through to an Nth switch pair, which necessitates additional voltage over-rating. In practice, the low side switch QSRN requires a 2× voltage over-rating, and the high side switch QMS2 requires an N times voltage over-rating, where N is equal to the number of series-connected transistor pairs or stages and is an integer greater than one.